Hello, Welcome to our new blog Verilog HDL. Most of Electronics and Communication Engineering branch students have a very good intent to enter into VLSI industry as Design and Verification Engineer but fortunately or unfortunately they are unable to enter into VLSI Industries like Cadence, Synopsys, Intel, Qualcomm, and many more we have and all these are top VLSI industries because, most of the colleges don’t upskill their students on these technologies.
So, through our blog I wanted to share my knowledge on one of the most important and powerful language for designing electronic digital circuits known as Verilog Hardware Description Language and some Digital Electronics concepts as well.
Now Let’s have a look on the skill set a Design Engineer or a Verification Engineer posses.
- Design: VHDL & Verilog HDL.
- Verification: SystemVerilog & Universal Verification Methodology(UVM).
Let’s get started.
Overview of Digital Design with Verilog HDL
Evolution of Computer-Aided Digital Design:
Digital circuit design has evolved rapidly over the last 25 years. The earliest digital circuits were designed with vacuum tubes and transistors. Integrated circuits were then invented where logic gates were placed on a single chip. The first integrated circuit (IC) chips were SSI (Small Scale Integration) Chips where the gate count was very small. As technologies became sophisticated, designers were able to place circuits with hundreds of gates on a chip. These chips were called MSI (Medium Scale Integration) chips.
With the advent of LSI (Large Scale Integration), designers could put thousands of gates on a single chip. At this point, design process started getting very complicated, and designers felt the need to automate these processes. Electronic Design Automation (EDA) techniques began to evolve.
Chip designers began to use circuit and logic simulation techniques to verify the functionality of building blocks of the order of about 100 transistors. The circuits were still tested on the breadboard, and the layout was done on paper or by hand on a graphic computer terminal.
With the advent of VLSI (Very Large Scale Integration) technology, designers could design single chips with more than 100,000 transistors. Because of the complexity of these circuits, it was not possible to verify these circuits on a breadboard. Computer-aided technique became critical for verification and design of VLSI digital circuits.
Computer programs to do automatic placement and routing of circuit manually on graphic popular. The designers were now building gate-level digital circuits manually on graphic terminals. They would continue until they had build the top-level block. Logic simulators came into existence to verify the functionality of these circuits before they were fabricated on chip.
As designs got larger and more complex, logic simulation assumed an important role in the design process. Designers could iron out functional bugs in the architecture before the chip was designed further.
Importance of HDLs:
HDLs have many advantages compared to traditional schematic-based design:
- Designs can be described at a very abstract level by use of HDLs. Designers can write their RTL description without choosing a specific fabrication technology.
- Logic synthesis tools can automatically convert the design to any fabrication technology.
- If a new technology emerges, designers do not need to redesign their circuit. They simply input the RTL description to the logic synthesis tool and create a new gate-level netlist, using the new fabrication technology.
Popularity of Verilog HDL:
Verilog HDL has evolved as a standard hardware description language. Verilog HDL
offers many useful features:
- Verilog HDL is a general-purpose hardware description language that is easy to learn and easy to use. It is similar in syntax to the C programming language.
- Designers with C programming experience will find it easy to learn Verilog HDL.
- Most popular logic synthesis tools support Verilog HDL. This makes it the language of choice for designers.
- All fabrication vendors provide Verilog HDL libraries for postlogic synthesis simulation. Thus, designing a chip in Verilog HDL allows the widest choice of vendors.
Applications:
- Processors in smart phones
- Laptop processors etc.
Conclusion:
In this blog, we have discussed the skill set required for the design engineer and verification engineer, introductory part of Verilog HDL like Evolution of computer-Aided design, Importance of HDL, Popularity of HDL, Applications.
In the next blog, we will get to know,
- Why chip design?
- How core companies manufacture processors?
- iPhone chip evolution.
- Hands-on on Verilog.
Thank you Everyone. Stay tuned for my next blog. Until then, Stay safe. Cheers✌.
Design is not just what it looks like and feels like. Design is how it works.
-Steve Jobs
One response to “Verilog HDL”
[…] Everyone 👋, Welcome back. We have covered Introduction to Verilog in detail in our previous article. In this blog post, we will discuss how semiconductor industries are manufacturing Integrated Chips […]
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